Date: 04/08/2010

Cortina Systems' PHY chip with hybrid DSP analog arch. reduces latency

Cortina Systems has released the CS4340, which it claims is the industry's smallest quad 10G Electronic Dispersion Compensation (EDC) PHY device packaged in 15mm x 15mm BGA. This high-speed communication chip is a programmable 4-port SFP+ PHY with integrated EDC allowing it to operate with linear SFP+ optical modules to support 10Gbase-LRM and Direct Attach Copper .

Due to its hybrid DSP analog architecture the CS4340 PHY features reduced latency of less than 1 nano sec which maximizes datacenter, server, and switching efficiency . Cortina says the competing solutions can be anywhere from 80 to 240 nsec.

The CS4340 PHY is tested for interoperability and can be used as standalone operation or programmed to optimize application specific performance and power.

The CS4340 PHY functionality supports four full duplex 10G links. Both transmit and receive paths include Clock and Data Recovery (CDR) circuits. The device operates in the frequency ranges covering 1GbE, 1G FC, 2G FC, 4G FC, 8G FC, SONET (9.5 - 11.3G), and 10GbE. The transmit path includes a 10Gbase-KR compliant 3 tap transmit pre-emphasis enabling the device to support 10Gbase-KR, 8G FC and telecom backplane applications. This fully autonomous device does not require external processors to control the initial convergence or the dynamic adaption of the dispersion compensation.

The Cortina CS4214 is a low power variant of the CS4340 PHY targeted to 10G SR/LR SFP+ line card, and 10G /40G Clock and Data Recovery (CDR) applications. The device contains all the features included in the CS4340 PHY. The SFI equalizer on the CS4214 PHY is capable of compensating loss introduced by the module connector and host board trace. The CS4214 PHY is complaint to SFF8431 limited interface and IEEE 802.3ba nPPI specifications. It enables 10G SR/LR SFP+, 40GBase-SR4/LR4 CFP and QSFP modules.

Cortina is fables semiconductor company with focus on broad range of wired and fibre communication interface.