Date: 26/07/2010

Lattice Semiconductor introduces 90 reference designs for processor interface apps

Lattice Semiconductor has released more than 90 reference designs optimized for the MachXO and ispMACH 4000ZE PLDs. These reference designs are suggested for functions such as general purpose I/O expander, I2C bus master / slave, LCD controller and SD Flash controller, as well as other interfaces, in a variety of markets including consumer, communications, computing, industrial and medical. The reference designs, coupled with complete documentation and design source code, are fully customizable and enable designers to reduce design time.

"We utilized Lattice's I2C controller reference design using MachXO PLDs in our Ethernet Access product," said Mr. Liang Shi Qiang, Hardware Manager at Raisecom Technology. "Lattice's reference designs and easy-to-use development kits allowed us to design and validate a broad range of functions, enabling us to get to market quickly."

"By delivering differentiated products that target a broad range of system and consumer applications, Lattice is gaining market share in the low density PLD market, in part as a result of making the design process more convenient by providing reference designs and easy-to-use development kits," said Gordon Hands, Director of Marketing for Low Density and Mixed Signal Solutions. "Our comprehensive portfolio of reference designs enables engineers to rapidly prototype their products."

These reference designs provide a good starting point for designers to begin prototyping their designs. Each reference design consists of documentation along with HDL source code (Verilog and/or VHDL) and test benches, many of which have been pre-implemented and validated using Lattice's low-cost development kits.

Reference designs for control applications, including I/O expansion, interface bridging, level translation and power-up sequencing using the MachXO family and have been validated using the MachXO Mini Development Kit. Using the preloaded mini system-on-chip (mini SoC) design provided with the development kit, designers can test I2C, SPI and UART interfaces in addition to the 8-bit LatticeMico8 microcontroller and low power sleep mode functionality. Designers can rebuild these demonstration designs using the free downloadable reference design source codes.

Lattice says designers targeting low power applications can use reference designs fully tested and verified using the ispMACH 4000ZE Pico Development Kit to accelerate the evaluation of ispMACH 4000ZE CPLDs. Using the preloaded ispMACH 4000ZE Pico Power demo design provided with the development kit, designers can test I2C master and LCD controller interfaces in addition to the embedded ispMACH 4000ZE oscillator timer, then build their own designs using the free downloadable reference design source code.

For more information visit: www.latticesemi.com.