Date: 24/06/2010

New process design kit by austriamicrosystems for its H18 technology

austriamicrosystems has made available its new analog/mixed signal high performance process design kit ("HIT-Kit") for its 0.18µm High-Voltage CMOS technology H18. It is based on Cadence Virtuoso custom design platform. This kit enables accurate simulation models and flexible pcells.

The key features of HIT-Kit v3.77 are:
1) Supports 0.18µm process technology H18 (High-Voltage CMOS) based on IBM's CMOS7RF.
2) Consists silicon-qualified digital, analog and RF library elements, complete sets of low voltage devices (1.8V and 5.0V) and high-voltage devices with various gate oxide thicknesses (20V and 50V devices).
3) This kit fully characterized simulation models for a large set of simulators, extraction and verification run sets as well as automatic layout device generators complete the H18 HIT-Kit offering.
4) The digital standard cell libraries in this H18 HIT-Kit have a gate density of 118kGates/mm² and are available both in standard and low leakage versions.
5) All I/O structures within the design kit are silicon-validated and meet the military ESD and JEDEC latch-up standards with I/O pads designed to surpass 4kV HBM and 250mA latch-up immunity.

"The H18 process is already the 6th generation of High-Voltage CMOS processes developed at austriamicrosystems and it is now ready for design and risk production. This new HIT-Kit v3.77 is a result of austriamicrosystems continuous efforts to deliver best-in-class design environment and analog foundry services to our customers," states Thomas Riener, Vice President and General Manager Full Service Foundry at austriamicrosystems. "The usage of the new HIT-Kit enables our customers to access our new 0.18µm High-Voltage CMOS specialty process."

For more information visit: http://asic.austriamicrosystems.com/hitkit377