Date: 21/01/2009

4.8Gb DDR2 iPEM device for defense and aerospace applications

Austin Semiconductor has announced an addition to their DDR2 family of "iPEM" (integrated Plastic Encapsulated Microcircuit) devices.

This new product is packaged in a 16mm x 23mm, 208 ball BGA with a ball pitch of 1.00mm. The 4.8Gb device is organized as 64M x 72 and offers performance benchmarks up to 667Mbps data rate while operating within the Mil-Temperature range of -55 Deg C to +125 Deg C, which makes it ideal for hi-reliability applications.

The 208 PBGA offers 61% space savings, 55% I/O reduction, reduced part count and reduced trace lengths for lower parasitic capacitance. "With 208 PBGA we continue to expand our product line of high performance highly integrated iPEMs.

"The AS4DDR264M72PBG1 is our smallest device in the 4.8Gb product offering and will continue to drive towards smaller, lower power and more reliable memory products using our integration process.", says Frank Muscolino, Vice President of Business Development. The AS4DDR264M72PBG1 has entered full production and is being delivered to all speed variants, including the DDR2-667Mbps variant operating at full military temperature range. A complete datasheet is available for download at www.austinsemiconductor.com.
IBIS and Thermal Models will be available in February 2009.

AS4DDR264M72PBG1 Features are,

1. DDR2 Data rate = 667, 533, 400
2. Available in Military, Enhanced and Industrial Temp
3. Package: 208 Plastic Ball Grid Array (PBGA), 16 x 23mm (1.00mm ball pitch)
4. Differential data strobe (DQS, DQS#) per byte
5. Internal, pipelined, double data rate architecture
6. 4n-bit prefetch architecture
7. DLL for alignment of DQ and DQS transitions with clock signal
8. Eight internal banks for concurrent operation (Per DDR2 SDRAM Die)
9. Programmable Burst lengths: 4 or 8
10. Auto Refresh and Self Refresh Modes (I/T Version)
11. On Die Termination (ODT)
12. Programmable output drive strength
13. 1.8V ±0.1V common core power and I/O supply
14. Programmable CAS latency: 3, 4, 5, 6 or 7
15. Posted CAS additive latency: 0, 1, 2, 3, 4 or 5
16. Write latency = Read latency - 1* tCK
17. Organized as 64M x 72 (64M x 64 version also available AS4DDR264M64PBG1)
18. Weight: ~ 2.0 grams typical