Date: 28/11/2008

Xilinx's Virtex-5 FPGA platform compliant with PCI Express version 2.0

Xilinx has announced its Virtex(R)-5 FXT FPGA platform is fully compliant with version 2.0 of the PCI Express(R) standard.
With built-in 6.5Gbps Rocket IO(TM) GTX transceiver technology, Virtex-5 FXT FPGAs are ideally suited to support the PCIe 2.0 specification, which doubles the interconnect bit rate over the previous version from 2.5Gbps to 5Gbps to support leading-edge high-bandwidth applications. The recently announced Virtex-5 TXT FPGA platform, which has up to 48 RocketIO GTX transceivers, also supports the PCIe 2.0 standard. Drawing less than 150mW typical, per transceiver at 5Gbps, the RocketIO GTX transceivers enable designers to realize high-speed PCIe 2.0 performance on an FPGA with minimal power consumption.


Xilinx teamed up with key alliance members to provide a comprehensive suite of design resources, including IP cores, for PCIe 2.0 multilane (x1, x2, x4, x8) support, hardware development platforms, and reference designs. These complementary offerings provide a complete, scalable and flexible solution to quickly develop systems with higher performing interconnect at lower cost to deliver first-time design success.

Xilinx Alliance Program members GDA, Northwest Logic and PLDA provide IP cores to enable PCI Express solutions on Xilinx Virtex-5 FXT FPGA devices.

For more information on the Xilinx PCI Express solutions, go to: http://www.xilinx.com/pcie