Date: 26/01/2010

Mentor's Catapult C is now full-chip capable

Mentor Graphics has announced that the Catapult C Synthesis tool has added SystemC synthesis, expanding the Catapult C tool's full-chip synthesis capabilities. This complements the Catapult C tool's existing algorithmic, control logic, and low power synthesis capabilities and expands its full-chip synthesis application scope through the efficient handling of specific SoC needs such as complex bus interfaces, SoC interconnect and TLM2.0-based ESL flows.

The Catapult C tool now supports SystemC cycle-based descriptions, and also offering support for transaction-level synthesis.

In addition to its support of abstract source descriptions in pure untimed ANSI C++, the Catapult C tool now offers an extra level of modeling granularity with cycle-accurate SystemC. This unique dual language approach offers a wide range of modeling and synthesis options.

The result is a standards-based method where legacy synthesizable SystemC models can easily be leveraged in the Catapult C environment, and linked with untimed ANSI C++ sources.

By supporting a modeling style compatible with the OSCI TLM2.0 approach, the Catapult C tool offers strong ties with ESL flows, methods and tools such as the Mentor Vista platform for comprehensive ESL design, verification and synthesis.

"Mentor's decision to add SystemC support to a proven high-level synthesis flow with Catapult C synthesis is very welcome," said Takashi Hasegawa, Deputy General Manager, SoC Solutions Division, Common IP & Technology Development Unit, Fujitsu Microelectronics Limited. "We've made efforts for a long time for the standardization of SystemC, and also anticipate that this addition will enable us to handle an even broader range of application challenges and provide more flexibility in using Catapult C with Fujitsu supplied silicon technology libraries for our mutual customers."

"By expanding the Catapult C tool's high-level synthesis language support to include both ANSI C++ and SystemC, Mentor is demonstrating its continuing commitment to standards and interoperability," said Simon Bloch, Vice President and General Manager of the Mentor Graphics Design and Synthesis Division. "In particular, the convergence of SystemC TLM and high-level synthesis will enable the semiconductor industry at large to move up in abstraction and make strides in improving overall design productivity."

For more details visit www.mentor.com