Date: 26/11/2009

Enhanced hierarchical chip design planning tool for SoC developer from Magma

Magma has released Hydra 1.1, a new enhanced version of its hierarchical design planning solution for large systems on a chip (SoCs) featuring out-of-the-box reference flows for channel-style, near-abutment, full-abutment, black-box, repeated-block and multi-power domain methodologies to enable fast delivery of better floor plans.

"For large SoCs, the traditionally manual approaches to feasibility analysis and chip planning are too inaccurate and time consuming," said Premal Buch, general manager of Magma's Design Implementation Business Unit. "Hydra provides designers the ideal combination of advanced capabilities and broad flexibility, letting them apply their expertise to critical issues while Hydra automates significant portions of the hierarchical design planning flow."

The key features of the Hydra 1.1 are,

Automatic macro placement
Concurrent cluster placement and shaping
Exclusive slack-proportionate time budgeting and incremental re-budgeting
Hierarchical global routing
Hierarchical clock tree planning

Magma claims most of these above features are industry's first.

Availability: Now
For more details visit www.magma-da.com