Date: 23/11/2009

eTools 8.0 software suite from eASIC for simplifying 45nm ASIC design

eASIC has made available eTools 8.0 software suite for implementing 45nm Nextreme-2 designs.

The eTools 8.0 software suite includes new capabilities that simplify the transition path to adopt the advantages of Nextreme-2 devices, which include a GUI-based design environment (Design Navigator), IP-wizards for easy integration of IP blocks, a power estimation tool that enables power estimation based on the RTL, and a floor planning tool for making optimal macro placements. Designers have the option of performing synthesis using Magma Talus RTL or Synopsys DC tools.

eASIC says, the eTools 8.0 tool suite and its Nextreme-2 chips offer low cost and low power alternative to FPGAs and a low NRE alternative to ASICs.


eASIC claims, unlike standard cell ASIC flows, the eTools 8.0 flow achieves better functionality and timing and not on arduous complex deep submicron ASIC tasks such as power mesh design, signal integrity, test insertion, DFM (design for manufacture) and clock insertion. So, the designers are able to progress from initial RTL to a netlist-level handoff to eASIC. Nextreme-2's unique and patented single-via based configuration technology enables eASIC engineers to rapidly tape-out and deliver prototypes in 6 to 8 weeks.

"eASIC is committed to the goal of making ASIC design achievable and affordable for the masses. We are seeing more and more FPGA designers use our technology to reduce the cost and power of their designs. With eTools 8.0 we are taking a giant step on the ease-of-use axis, thus enabling designers to create a rapid, low cost, low risk path to ASIC," said Dr. Ranko Scepanovic, Senior Vice President, Software and Advanced Technology at eASIC Corporation.

For more details visit www.eASIC.com