Date: 29/10/2009

Dual-output, low-jitter clock oscillator from Maxim for communications apps

Maxim has introduced the DS4625, a dual-output, low-jitter clock oscillator capable of producing frequency output pair combinations ranging from 100MHz to 625MHz. The DS4625 is suitable for communications systems that require high-performance clock generation such as Fibre channel, Ethernet, 10G Ethernet, SONET/SDH, InfiniBand, GPON, BPON, PCI Express, and SAS/SATA.

The DS4625 provides dual, low-voltage, positive emitter-coupled logic (LVPECL) clock output drivers. The output drivers can be enabled and disabled through the OE pin, which is an active-high CMOS input that has an internal pullup resistor. When high, both output pairs are enabled.

The key features of the DS4625 are,

Standard clock output frequencies of 100MHz, 125MHz, 150MHz, 156.25MHz, and 200MHz
Phase Jitter < 0.7ps RMS (typical) from 12kHz to 20MHz
LVPECL output
Operating input voltage from +3.3V ±10%
Excellent power-supply noise rejection
Output Enable/Disable

The DS4625 is designed using fundamental AT-cut crystal technology with no overtones and a low-noise PLL-based oscillator designed in Maxim's SiGe foundry, which provides low aging of < ±7ppm over 10 years, and frequency stability characteristics of less than ±50ppm, including variations due to voltage, temperature, initial tolerance, and aging. Compared to SAW-based oscillator designs, the DS4625 offers a small footprint, comparable jitter performance, and better stability.

Package: 5.0mm x 3.2mm Ceramic LCCC package
Price: Starts at $9.70 for 1k pieces
Availability: Now in samples

For more details visit www.maxim-ic.com

Editorial product rating: Average