Date: 13/10/2009

New 18 MegaPixel camera processor IP core from Silicon Image for electronic devices

Silicon Image has introduced the camerIC-18, a new member of its family of camerIC camera processor IP cores. The camerIC-18 with its high-quality 18 MP image signal processing (ISP) technology, targeted for integration into digital still camera (DSC) and video System-on-a-Chip (SoC) application processors for mobile devices such as cell phones, portable multimedia players (PMPs) and netbooks.

The camerIC-18 supports resolutions ranging from 5MP to 18MP, all in a single low-cost/low-power design. The camerIC-18 IP core includes bad pixel detection/correction and noise reduction techniques to ensure image quality even when combined with the low cost, high-resolution CMOS sensors found in mobile devices, to effectively deliver resolutions above 12MP.

The camerIC-18 IP core also supports wide dynamic range processing and digital image stabilization along with an extensive set of standard features including lens shade correction, auto focus measurement, auto white balance and auto exposure support by brightness measurement.

"Mobile phone cameras of increasing resolution are becoming pervasive throughout the market," said Will Strauss, principal analyst with Forward Concepts. "It's just a matter of time before the feature sets commonly found in DSCs will be integrated into mobile devices and the camerIC-18 camera processor intends to accelerate this market transition."
"Since 2002, Silicon Image has led the market in delivering cost-effective, low-power camera processor designs for use in mobile applications," said Ron Richter, director of business development at Silicon Image, Inc. "The camerIC-18 IP core continues this tradition by providing mobile SoC developers with market leading digital still camera and camcorder capabilities and flexibility in choosing CMOS sensor suppliers."

The camerIC-18 IP core has the imaging bandwidth to support HD, 3D, 4K and high-resolution video camcorder ISP functions.

Silicon Image says A 4K resolution camcorder design incorporating a camerIC-18 IP core and running at 30 frames per second will only require about 700k gates to be implemented in hardware and consumes as little as 125mW of power. Only 30 million instructions per second (MIPS) of CPU time are required to support this hardware design, making the camerIC-18 IP core one of the high performing, low cost, low power consumption camera processors.

The camerIC family of IP cores also includes a HDMI technology solutions, including transmitters and receivers incorporating HDMI specification version 1.4 features, Mobile High-Definition Link (MHL) technology, Serial ATA storage (SATA), and high-definition MPEG / H.264 / VC-1 video decoder applications.

For more details visit www.siliconimage.com

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