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  Date: 22/09/2009

A single, unified StarRC Custom extraction solution from Synopsys

Synopsys has announced that its new StarRC Custom parasitic extraction solution for analog mixed-signal (AMS) and custom digital IC design, by combining the gold standard Star-RCXT extraction technologies and the Raphael NXT 3D fast field solver that offers a high performance runtime with tuned accuracy to meet the high-sensitivity custom circuits.

This comprehensive offering includes optimized links with Synopsys' CustomSim circuit simulator. StarRC Custom also seamlessly integrates with Synopsys' Galaxy Custom Designer implementation solution.

StarRC Custom incorporate technologies such as hierarchical extraction, feature-scale chemical-mechanical polishing (CMP) effects modeling and variation-aware extraction to achieve signoff accuracy while meeting stringent tapeout schedules.

"The widespread use of custom circuits in today's complex system-on-chip (SoC) designs is creating a severe simulation and signoff bottleneck," said Robert Hoogenstryd, director of marketing for design analysis and signoff at Synopsys. "Increasing transistor count combined with the modeling of more complex parasitic effects is resulting in transistor-level simulation runtimes doubling and quadrupling. To address this challenge, Synopsys took a unique approach with StarRC Custom by focusing not only on extraction runtime and accuracy, but also on optimizing the extraction data to improve overall transistor-level simulation throughput."

Availability: General customer availability planned in December 2009

For more details visit www.synopsys.com

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