Date: 26/05/2010

New 6Gbps dual SerDes IC from TI saves from costly FPGA with high-speed interface

Texas Instruments has introduced a 6-gigabit per second (Gbps) dual serializer-deserializer IC (SerDes) named TLK6002 that enables continuous data rate support from 470 megabits per second (Mbps) up to 6.25 Gbps for wireless applications. This SerDes IC can be used in a range of wireless infrastructure applications including WiMAX, TD-SCDMA, WCDMA and CDMA2000.

The TLK6002 supports the new faster speeds in the Open Base Station Architecture Initiative (OBSAI) and Common Public Radio Interface (CPRI) standards required for all wireless base station designs. It uses either a single 122.88-MHz or 153.6-MHz fixed reference clock frequency. The CPRI/OBSAI data rates that are supported are 0.6144, 0.768, 1.2288, 1.536, 2.4576, 3.072, 4.9152 and 6.144 Gbps. It consists of a 20-bit parallel single-ended interface that can connect easily with FPGAs (Field-Programmable Gate Arrays). TI claims that the combination FPGA and TLK6002 is more economical as compared to FPGAs featuring high-speed serial links.


Other key features of TLK6002 are:

--Receiver equalization and transceiver pre-emphasis improves signal integrity by compensating for amplitude losses in cables and for ISI (inter-symbol interference), enabling a trace reach of greater than 50 cm.
--Integrated automatic CPRI/OBSAI rate sensing "self-tunes" to the system setting, eliminating the need for additional hardware or software.
--Integrated high-accuracy latency measurement (0.6510 ns at 6.144 Gbps) relieves designers' workload by simplifying the system design.

Package: 324-ball BGA

Price: US$35.00 in 1,000-unit quantities

Availability: Now

For more information visit: www.ti.com