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  Date: 14/12/2017

Best papers at VLSI verification event TrueConnect 2017

Noida based Verification IP Specialist Truechip successfully hosted its 1st Annual Technical Conference, TrueConnect 2017 in Bengaluru.

VLSI design engineers and experts from leading semiconductor companies such as Western Digital, Cypress Semiconductors, Microsemi, NXP, Qualcomm, Infineon Technologies, Intel, Broadcom, Texas Instruments, MediaTek have participated in the event.

Nitin Kishore, Founder & CEO, Truechip commented “We wanted to host an open technical conference for design and verification professionals since this plays a vital role in chip design. TrueConnect is unlike other EDA conferences, since it does not focus on EDA tools and allows anybody from this domain to participate and submit papers”.

Saurabh Agarwal, Head, Marketing and Sales, Truechip, who was instrumental in successfully conducting the event said "TrueConnect 2018 edition we will have multiple tracks, keynotes and panel discussions”.

Sanjay Gupta Vice President and Country Manager, NXP Semiconductor, and Uday Mishra, Director, ASIC Design Engineering Management, Western Digital delivered keynote speeches, where both concluded the importance of semiconductor chip design verification to ensure hack-proof and fail-proof safe robots and self-driving cars.

There was also a panel discussion on the subject of "Design and verification sign-off and closure - quality and quantum" with Amardeep Punhani- Director Automotive Digital IP for India operations, Sudhakar Reddy Amireddy, Verification Manager, Infineon Technologies, Omprakash Jha, Principal Engineer, Western Digital and Vishal Dalal, Verification Lead, Texas Instruments on the panel.

The best paper presentation at TrueConnect 2017 were adjudged by Mr. Prasad Joshi, Sr. Manager, IBM India and Mrs. Vandana Goel, Program Manager, MediaTek.

The 1st prize was given to Surya Nallathambi and Jayakanthan Arthanari from Western Digital for the paper titled “Implications & modus operandi applied for 100% FSM Coverage Closure”.
The 2nd prize was awarded to Mr. Giridhar Chelluri and Mr. Sukhjeet Singh from Truechip for the paper titled “Dynamic configurability in static blocks”.
The 3rd prize was given to Ms. Prajakta Rohom and Mr. Mukul Goyal from Open Silicon for the paper titled “Robust Approach to verify Training requirements of high bandwidth memory IPs”

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