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  Date: 28/10/2020

Zynq RFSoC DFE with more hard silicon for mass 5G Radio

Zynq RFSoC DFE from Xilinx now combines hardened digital front-end (DFE) semiconductor blocks and adaptable logic targeting low power, and cost-effective 5G NR radios for any spectrum band of 5G. The combination of hard silicon and programmable silicon in this chip is balanced to meet today's requirements of flexibility, scalability and time to market. The hardware blocks save power and increase performance. Whereas the soft blocks allows to offer adaptive logic so that the evolving standards 5G 3GPP and O-RAN radio architectures can be enabled witout any hardware changes. "For the first time, Xilinx is providing a wireless radio platform with more hardened application-specific IP than adaptive logic to address low power and low cost 5G requirements,” said Liam Madden, executive vice president and general manager, Wired and Wireless Group at Xilinx. “With the market needs around 5G evolving, integrated RF solutions need to be adaptable to address future standards. Zynq RFSoC DFE provides the optimal balance between that adaptability and fixed function IP.”
Zynq RFSoC DFE with doubled performance/watt compared to its prior version can perform all the way from small cell to massive MIMO macrocells.It features carrier aggregation/sharing, multi-mode, multi-band 400MHz instantaneous bandwidth in all FR1 bands, and emerging bands up to 7.125GHz. When used as a millimeter wave intermediate frequency transceiver, it provides up to 1,600MHz of instantaneous bandwidth. Zynq RFSoC DFE allows designers to bypass or customize the hard IP blocks,like they can use GaN power amplifiers supporting Xilinx’s DPD or any other DPD IP.
“As 5G continues to evolve in both commercial deployments and new use cases, it is critical for the supply chain to provide flexible components for vendors to create cost effective, adaptive and future-proof equipment. Open RAN takes this requirement to a much higher level, where flexible designs are paramount to its success,” said Dimitris Mavrakis, senior research director of 5G at ABI Research. “With its balance of hardening and adaptable logic, Zynq RFSoC DFE is a unique offering which combines the cost characteristics typically found in ASICs while providing the design flexibility and customization available in an FPGA.”
Zynq RFSoC DFE design documentation and support is available to early access customers, with shipments expected during the first half of 2021.

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